The replacement evaluation of low acoustic noise capacitors is demonstrated. The acoustic noise phenomenon occurs in some cases due to the piezoelectric properties of ceramic. In order to solve this, Murata has developed a low acoustic noise capacitor! Click here to experience the effectiveness of the low acoustic noise capacitors of Murata.
(06:51)
Along with the noise reduction of electronic devices, the "acoustic noise" caused by the vibration of capacitors, which was not conventionally noticeable, has become a design issue in the power circuits of various applications, such as laptop computers, mobile phones, DSC, etc. (Location shown in Figure 1.)
A conventional ceramic capacitor (GRM Series) and a material with a lower dielectric constant than conventional ceramic material were used in this demonstration. This demonstration is to confirm the level of acoustic noise by listening, using three types of capacitors, such as a low distortion type capacitor (GJ8 Series), a ceramic capacitor mounted off of the board using terminal plates, and a metal terminal capacitor (KRM Series), which suppresses the transmission of vibrations to the board. A square wave of 12V was generated in the demonstration kit, and was input to each capacitor via a SW. Acoustic noise is generated by adjusting the frequency of the square wave with the resonance frequency of the capacitor and board to within a range of 0 Hz - 12.75 kHz (50 Hz steps) using software on a personal computer.
Figure 1. Example of Acoustic Noise Locations in Power Circuit of Laptop Computer (figure missing?)
Figure 2. Deformation of Chip by Electrostrictive Phenomenon when Applying a Voltage
Figure 3. Deformation of Board by Electrostrictive Phenomenon
Figure 4. Comparison of Acoustic Pressure between GRM and GJ8 Series
Figure 5. Comparison of DC Bias Characteristics between GRM and GJ8 Series
Figure 6. KRM Series Configuration 1
Figure 7. KRM Series Configuration 2
The operation circuit (structure) of this demonstration is described in the following.
A square wave is generated by the frequency (cycle) set in the software in the FPGA of the demonstration kit (SysCube) (3.3 V amplitude). The square wave was amplified to 12 V in the FET, which is mounted on the main board of the acoustic noise reduction parts, and was input into the applicable capacitor via a SW. At this time the electrostrictive effect of the capacitor is generated and acoustic noise occurs. The volume of the acoustic noise changes by changing the frequency (cycle) of the square wave in the software.
Figure 8. SysCube Demonstration Kit
(1) Common capacitor **: GRM31MR71E105kA01L (3216 size, 1 μF)
(2) Capacitor with changed material: GJ831cc81E105kA01L (3216 size, 1 μF)
(3) Metal terminal capacitor: KRM31KR72A105KH01L (3216 size, 1 μF)
Figure 9. Main Board of Low Acoustic Noise Capacitor Evaluation Demonstration
(1) Frequency tuning function: The frequency can be tuned to any value between 0 Hz - 12.75 kHz (50 Hz steps).
(2) Memory function: After the frequency is changed, the frequencies with larger acoustic noise can be saved to memory in three positions maximum and called up.
Figure 10. Software Operation Screen for Resonance Frequency Tuning
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