At this point, the team measured the chip's impedance in the states of high resistance and low resistance in order to detect the original cause of the resistance change phenomena induced by the electric field. These results are shown in Fig. 5. The chip the team made as the schematic band structure in Fig. 6 seems to have formed grain boundary barriers on grain boundaries and Schottky barriers on electrode boundaries similar to ordinary SrTiO3 varistors. The impedance characteristics obtained can be fit with the equivalent circuit model which has three linearly connected sets of parallelly connected capacitor and resistor as indicated by the schematic band structure. The parameters of inside grains, grain boundaries and electrode boundaries are shown in Table 1. From the obtained parameters, the resistance change phenomena in the chip we made were rooted mainly in resistance of grain boundaries judging from the facts that resistance inside grains scarcely changed before and after resistance changes in high and low resistance states whereas resistance on grain boundaries changed largely as high as about two digits. Though further investigations may be necessary for establishing precise mechanisms, an assumption has been derived from these results and the chip's voltage nonlinearity that grain boundary barriers formed on prompted defects to move by applied voltages or capturing electric charges to the boundary level, thereby causing large resistance changes.
As mentioned above, resistance switching memory characteristics have more challenges, and as to the mechanism there are more unfamiliar points. The research team, however, demonstrated the possibility that SrTiO3 ceramics can achieve large resistance changes like a thin film ReRAM device, and that grain boundaries are attributable to the phenomenon of resistance change. From now on, the team will research methods for stabilization of the various characteristics and the mechanism itself, and intends to develop applications for new functional chips using ceramics.
Fig. 5 Impedance characteristics in high and low resistance states The inserted drawing is an enlargement from near the original point, showing impedance characteristics in the high frequency range.
Fig. 6 Schematic band structure of a chip and equivalent circuit model
Table 1 Parameters of inside graingrain boundary, and electrode boundary