For the inverter of the oscillation circuit using the CERALOCK®, we recommend you select the unbuffered type (4069UB/74HCU04) comprised of the C-MOS single-stage inverter. Although oscillation is enabled with the triple buffered type (4049/4011/74HC04) comprised of triple-stage inverters, or with the Schmitt trigger type, we cannot recommend these types, because they may frequently develop abnormal oscillation. That is because the triple buffered type and the Schmitt trigger type provide extremely high gain, so that the oscillation attributed to "CR" of the circuit or "LC" of the wiring, or the ring oscillation (caused by gate delay time) will be superimposed on the waveform of the CERALOCK®. The CR/LC/ring oscillation can be reduced to some extent by providing proper circuit constants, but it is impossible to eliminate these oscillations completely.
The oscillation circuit is the heart of the sets, because it determines the clock frequency. We cannot recommend using a NAND or NOR gate IC, because it is designed as a triple buffered type, and therefore it may frequently develop abnormal oscillation when used in an oscillation circuit. To control oscillation ON/OFF status, controlling the output from the oscillation circuit is a preferable method, rather than inserting a gate IC in the oscillation circuit. For this purpose, you must prepare a dedicated oscillation circuit after thorough consideration, instead of building an oscillation circuit using a surplus gate IC, or inserting an ON/OFF control device in the oscillation circuit.
Recently, ICs incorporating only two unbuffered gates are also available for an oscillation circuit.
Circuit that may frequently develop abnormal oscillation
Triple buffered IC
With ON/OFF control device in oscillation loop
Circuit that provides stable oscillation
Without ON/OFF control device in oscillation loop