As GaN high-frequency, high-power transistors gain in popularity for the PA design of base stations, PA performance has significantly improved, with higher power than conventional Si LDMOS transistors and the capability of handling high-temperature and high-speed (high frequency) operation. This means that while transistor performance has improved, there is a need for greater durability in rigorous usage environments with respect to peripheral parts.
Fluctuations in operating temperature can greatly affect the selection of the Vdrain decoupling capacitor, which requires a large capacitance for stable PA operation.
While the advantage of an electrolytic capacitor is the large capacitance that can be obtained per unit, there is a risk of reliability in an environment of long-term continuous use at high temperatures, as with a base station PA. Today, the design that is widely adopted achieves the capacitance needed by connecting 10 to 20 3225-size chip multilayer ceramic capacitors (125℃-guarantee, 50 to 100 Vdc, 4.7 to 10 uF) in parallel for Vdrain decoupling.
However, recently, we are seeing designs that use GaN transistors to enable large voltage operation and that operate at a drain voltage 48 V, increased from 28 V. Because ceramic capacitors with a high dielectric constant have characteristics that reduce the effective value of capacitance as the applied DC voltage increases (DC Bias characteristics), the number of capacitors connected in parallel must be increased to secure the capacitance. Meanwhile, as the number of on-board parts increases due to multiple-output (increased Tx) specifications, the area of the decoupling capacitor must be reduced.
Murata offers a lineup of capacitors with metal terminals that can achieve a high capacitance while occupying a small area as a result of creating multilayer ceramic capacitors with two layers. Large (5750) chip multilayer ceramic capacitors tend to be avoided due to cracks caused by mechanical stress or cracks while soldering caused by the temperature cycle, but metal terminals can absorb that stress and successfully minimize those risks. The large capacity and space-saving design of capacitors for transistor Vdrain decoupling can provide greater design freedom.